There is two models of DDR xServe G4:
A) A 133 Mhz System bus and ATA 100 Hard disk Interfaces and FW400.
B) A 166 Mhz System bus and ATA 133 Hard disk Interfaces and FW800.
In the A model the ATA 100 may help, but we are pushed to try the bus overclocking using the MDD procedure, never tested in the Xserve...
Getting rid the Open Firmware barrier to a MacRISC2 kernel (Mac Os 9) it isn't easy, but it was done before. The real challenge comes now:
Comparing the
PowerMac G4 MDD Architecture Block Diagram:
With the
xServe G4 (133Mhz Bus) Architecture Block Diagram:
It's easy to see that the secondary PCI bus is really different from the MDD one. There is two PCI bridge interfaces ic (integrated circuit) and two ATA 100 ic. Probably Mac Os ROM 10.2.1 don't understand this part of the motherboard, so if don't bring it to a crash, it is better to ignore it by now.
So our possibilities must be limited to Uni-North 2 direct devices: Firewire, Ethernet, AGP etc...