For now we know fairly little about the Emulator, but it is likely we will need to look more closely, because it seems to be the immediate barrier to running Mac OS 9 on the Mac mini.
I did some research on the design and implementation of the Macintosh 68k Emulator long ago based on my personal reverse-engineering effort. I don't remember all the details but I'll do my best and try to summarize the most important points right off the top of my head.
The very first version of that emulator shipped with the PDM Macs (i.e. PowerMac 6100, 7100 and 8100) was written by Gary Davidian. It's the so-called interpretative emulator because it stupidly interprets one 68k instruction at a time by fetching its opcode from memory and executing the dedicated emulation subroutine.
Because the "interpretative" approach to emulation has been quickly proven to be rather slow, an add-on, called "DR emulator" has been developed. "DR" stands for "dynamic recompiling" and means that the emulator will translate chunks of guest code (68k) into native code (PPC) on the fly. The DR emulator caches translated code for the frequently executed guest code blocks in a dedicated memory called "emulator cache" and uses the translated native version whenever possible. This greatly helps to speed up loops. The DR emulator has been written by Eric Traut - the same guy who wrote the famous Connectix VirtualPC x86 emulator (owned by M$oft now). The DR emulator entered the Mac world with the first PCI-based Mac.
The code of the 68k emulator consists of two parts: the opcodes table and instruction emulation subroutines. The DR emulator adds several translation subroutines as well as DR emulator cache.
The opcodes table has the size of 0x800000 bytes = 65536 opcodes * 2 PPC instructions * 4 bytes. There are therefore 2 PPC instructions for each of 65536 68k opcodes: the first one is the part of emulation and the second one jumps either to the emulation subroutine (for complex instructions) or to the fetch subroutine of the next opcode (for simply instructions that can be emulated with only one PPC instruction).
Both versions of the 68k emulator run
in the user mode and communicate with the NanoKernel through the so-called "kernel trap table" that consists of eight TWI instructions trapping directly into the NanoKernel. All pre v2 NanoKernel calls (MMU and exception handling) are implemented as F-Traps - the "SC" instruction isn't used in the NanoKernel v1.
Emulator's memory (state and cache) is allocated by NanoKernel. Moreover, the emulator requires the so-called ROM Overlay to be implemented in the NanoKernel. That means that during emulator's startup or reset the logical address $000000 - $01FFFF will be mapped to ROM by the NanoKernel in order to emulate the behavior of the 68k CPU that fetches the address of the first instruction at $0000. As long as 68k will access memory in the address range $400000 - $41FFFF, NanoKernel will detect this condition and switch off the ROM Overlay by remapping the address range $000000 - $01FFFF back to RAM.
There is a dedicated F-Trap call for the 68k emulator that is used by the system software to modify emulator's state and to query some internal information like emulator's version. The "emulator update extension" of the MacsBug 6.6 (6.3?) package relies heavily on this call to detect buggy emulator versions requiring patches...
This is the basic info. Feel free to ask me if you have any questions...